Senior Physical Design Engineer

Required Skills and Experience

- Professional experience in executing physical design projects from 5 years of experience. - Proven ability in technically leading a small/medium-sized team for executing projects preferred. - Hands-on experience on the entire PD Flow from RTL to GDSII. - Should have a good understanding of Floor planning, Power Planning, Placement and optimization, CTS, Routing, Design Convergence, and Sign-off with in-depth expertise in at least one of these domains. - Working knowledge about OCV, MM/MC optimization and multi power designs (Level shifters, Isolation cells etc). - Exposure to static timing analysis fixes including automated ECO generation. - Strong in areas of CTS and skew fixing. - Library preparation in any environment (Synopsys, Cadence etc). - Working knowledge of Physical verifications tasks at lower nodes (data base merging/DRC/LVS/ERC/PERC/Antenna/ESD/LUP analysis/fixing) at block level/chip level. - Job would require complete ownership from netlist/RTL to GDS for blocks at Block level OR full chip level. - Exposure to IP Hardening for blocks like SERDES, USB PHY, MIPI, SATA will be an added advantage. - Working knowledge of scripting language like Perl, TCL will be considered a plus. - Should be able to define project milestones, identify risks, and call out mitigation plans.

Why Candidate should apply this position

- 18 paid leaves per year (including 12 annual leaves + 6 personal leaves). - Insurance plan based on full salary + 13th salary + Performance Bonus (quarterly). - 100% full salary in probation period. - Medical Benefit (Personal) and Family based on levels. - Working in a fast-paced, flexible, and multinational working environment. Chance to travel onsite (in 49 countries). - Internal Training (Technical & Functional). Scope of English Training.