SoC Design Verification Engineer
Enginering
福利厚生
13ヶ月目の給与
完全な社会保険
職務概要
As a SoC Design Verification Engineer, you will play a crucial role in ensuring the correctness and performance of our semiconductor designs. Your responsibilities will include: - Implementing simulation test benches using UVM. - Developing and executing test plans to verify the design. - Investigating and debugging failures in simulation to identify root causes. - Collaborating closely with logic designers for test plan development, execution, debug, coverage closure, and gate level simulations.
必要なスキルと経験
To excel in this role, you should have the following qualifications: - Strong verification skills and understanding of methodology, including object-oriented programming, white-box/black-box testing, directed/random testing, coverage, and gate-level simulations. - Proficiency in Unix/Linux environment and scripting languages (shell/Perl/Python). - Excellent analytical and problem-solving skills. - Ability to multitask in a fast-paced environment. - Effective interpersonal and teamwork skills. - Bachelor's degree in Computer Science or Electrical Engineering with 5+ years of relevant experience, or Master's degree with 3+ years of related experience.
この求人に応募する理由
By joining us, you will enjoy the following benefits: - Opportunity to work in an innovative, fun, and fast-paced startup environment. - Supportive work culture that promotes employee growth and development. - Additional opportunities for career advancement and professional growth. - Chance to contribute to cutting-edge technologies and impactful products with high market potential.
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