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Design Verification Engineer (VLSI)

Designer Testing Test Plan Writing Scripting

Icon salary 給与
交渉可能
Icon Location 勤務地
Hanoi, Ho Chi Minh
Icon Vacancies 総空席数
1 人

福利厚生

完全な社会保険 完全な社会保険
柔軟な勤務時間 柔軟な勤務時間
人事考課 人事考課
社員旅行 社員旅行
once a year
業務用ノートパソコン/デスクトップ 業務用ノートパソコン/デスクトップ
Laptop/MacBook with high specs
実績に応じた追加の報酬 実績に応じた追加の報酬
追加の健康保険 追加の健康保険
13ヶ月目の給与 13ヶ月目の給与
その他 その他
Chance to travel onsite (in 49 countries).
在宅勤務ポリシー 在宅勤務ポリシー

職務概要

Full chip test plan development/modification Testbench development/modification Test case development, coding, execution, bug analysis Regressions, coverage analysis Verification closure To ensure process compliance in the assigned module| and participate in technical discussions/review. To prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations

必要なスキルと経験

Bachelors/Master’s degree in Electronics /Electrical Engineering with 5+ years’ experience in verification. Good understanding of ASIC/SoC life cycle. Experience with Full chip test plan development/modification. Experience with Testbench development/modification, Test case development, coding, execution, bug analysis, Regressions, coverage analysis, Verification closure. Experience with Gate level simulations. Experience in scripting. Should have participated in multiple ASIC/SoC verification till tape out stage. Be able to use English in working communication. Required Skills: Design Verification - VLSI- System Verilog

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