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[HCM] Analog Layout Design Engineer

Designer Enginering Development Engineering Research Presentation Visualization Teamwork

Icon salary 給与
交渉可能
Icon Location 勤務地
Ho Chi Minh
Icon Vacancies 総空席数
1 人

福利厚生

追加の健康保険 追加の健康保険
柔軟な勤務時間 柔軟な勤務時間
完全な社会保険 完全な社会保険
人事考課 人事考課
社員旅行 社員旅行
業務用ノートパソコン/デスクトップ 業務用ノートパソコン/デスクトップ
実績に応じた追加の報酬 実績に応じた追加の報酬

職務概要

Candidates do not have to have experience on all the tasks below, there will be trainings to new engineers to adapt with Synopsys design and flows. - Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees... - Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics - Understand and apply Analog Layout techniques to ensure design meet performance with minimum area and good yield. - Participate in building and enhancing layout flow for faster, higher quality design process. - Do layout verification for DRC/LVS/ERC/ANT/ESD/DFM - Do PERC verification for ESD/LUP checks - Complete all design quality checks and data quality checks - Work with Place and Route engineer to integrate analog layouts into top level. - Work with Package team to ensure the integration of top die and package - Do design reviews across global team - May collaborate in package design (interposer design, RDL design) - Work closely with design team in Viet Nam, USA, Canada and other countries to ensure the success of the whole product. - May join research programs to implement new ideas for future products and flows - May lead a layout team to complete a full design block - Mentor junior layout engineers or interns

必要なスキルと経験

- BS in Electronics Engineering, Electromechanics, Physics, Telecommunications. - 2+ years of experience in custom layout. - Familiar with Layout entry tools: Cadence, Synopsys - Familiar with Layout verification tools: Mentor Calibre, Synopsys ICV - Understand basic semiconductor fabrication processes - Understand MOSFET fundamentals - Understand layout techniques for high speed, matching, ESD, Latchup, Antenna, EMIR. - Experienced with mentoring/leading junior layouts to complete a design. - Experienced with writing layout review presentations and layout verification reports - Good English communication - Strong team player - Self-motivated, humble, honest and willing to learn.

この求人に応募する理由

Benefits - Insurance - Travel - Team building - Birthday celebration - Promotion - Bonus - Healthcare - Training - Days off on Saturday and Sunday


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