The Senior Manager for ASIC Design Verification will be entrusted with the leadership of a dedicated team of design and verification engineers. This role encompasses the development of switch IP units, with the team being accountable for both unit and cluster level design and verification tasks. The Senior Manager will collaborate closely with architects to shape the unit's architecture, allocate tasks, oversee team progress, and foster the professional growth of team members. A hands-on approach is essential, as the Senior Manager will actively engage in the verification process and assess digital circuits within high-speed data communication integrated circuits. The ideal candidate will play a pivotal role in crafting verification plans, establishing test environments, modeling, and driving the development and execution of test cases. They will undertake the verification of blocks and chips, as well as validate CPU, DDR, SAS, SATA and PCIe functionalities, employing UVM methodologies and System Verilog. This position demands a proactive leader who can guide their team through complex verification processes to ensure the highest standards of ASIC design
Bachelor’s degree in Computer Science, Electrical Engineering, or related fields and 8-14 years of related professional experience. Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 6-10 years of experience. Strong knowledge of UVM/OVM/VMM, SVA and Formal verification. Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete. Develop tests and tune the environment to achieve coverage goals. Debug failures and work with designers to resolve issues. Strong ability in scripting languages such as Perl, Python, Makefile, C Shell. Knowledge of power management and power simulation using UPF. Good personal communication skills and a team-working spirit. Hardworking and motivated to be part of a highly competent team. At least one year of experience in direct management of experienced engineers. Proven leadership and problem-solving skills focusing on uncompromised quality, innovation, and continuous learning and improvement. Strong communication, collaboration, and teamwork skills and the ability to work in a global team environment. Ability to build plans and define immediate and future needs based on project requirements. Ability to build career conversations, develop individual performance plans to enhance direct reports’ skills.
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Hands-on knowledge of ARM processor-based subsystem verification. Working knowledge of C/C++ and ARM Assembly programming. Experience with Gate Level Simulations.