Design Verification Engineer (VLSI)

Designer Testing Test Plan Writing Scripting

Icon salary Gaji
Negotiable
Icon Location Lokasi
Hanoi, Ho Chi Minh

Keuntungan

Full social insurance Full social insurance
Flexible working time Flexible working time
Salary review Salary review
Travel/company trips Travel/company trips
Laptop/desktop for works Laptop/desktop for works
Performance bonus Performance bonus
Extra health insurance Extra health insurance
13th month salary 13th month salary
Others Others
Work-from-home policy Work-from-home policy

Gambaran besar dan Tanggung jawab pekerjaan

Full chip test plan development/modification Testbench development/modification Test case development, coding, execution, bug analysis Regressions, coverage analysis Verification closure To ensure process compliance in the assigned module| and participate in technical discussions/review. To prepare and submit status reports for minimizing exposure and risks on the project or closure of escalations

Keahlian dan pengalaman yang dibutuhkan

Bachelors/Master’s degree in Electronics /Electrical Engineering with 5+ years’ experience in verification. Good understanding of ASIC/SoC life cycle. Experience with Full chip test plan development/modification. Experience with Testbench development/modification, Test case development, coding, execution, bug analysis, Regressions, coverage analysis, Verification closure. Experience with Gate level simulations. Experience in scripting. Should have participated in multiple ASIC/SoC verification till tape out stage. Be able to use English in working communication. Required Skills: Design Verification - VLSI- System Verilog

Mengapa kandidat disarakan untuk posisi ini

Keahlian dan pengalaman yang disarakan

Preferred Qualifications: University or College

Evelyn L

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Evelyn L

Headhunter | Recruiter
Verified
Icon employee 131 candidates
Icon cup 25 interviews
Icon health 8 offers

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